BIOS信息代码+报警声音
AWARD
1短：系統啟動正常。
2短：CMOS設定錯誤。
一長一短：DRAM錯誤。
一長二短：顯示卡或螢幕連接錯誤。
一長三短：鍵盤錯誤。
一長九短：ROM錯誤。
不斷長響：DRAM未插好。
不停急響：電源有問題。
AMI
1短：DRAM刷新錯誤。
2短：DRAM 同位元檢查錯誤。
3短：基本64K RAM檢查失敗。
4短：計時器無法運算。
5短：CPU錯誤。
6短：8042無法取得A20（檢查鍵盤）。
7短：CPU中斷錯誤
8短：顯示卡記憶體寫入/讀取錯誤（檢查顯示卡）。
9短：ROM檢查碼錯誤。
10短：CMOS 關機暫存器寫入/讀取錯誤。
11短：快取記憶體故障。
燈號錯物代碼（微星主機板才有）
MSI D-LED
BIOS
Chipset
L2 Cache
BIOS Shadow
CPU Information
VGA
CPU
USB
IRQ
Memory
PS/2 Mouse
Auto Config
IDE
Dual CPU
IRQ TO PCI
OK
POST CODE （只有DEBUG CARD才會顯示）
AWARD 6.0 POST CODE
POST (hex)＆Description
CF
Test CMOS R/W functionality.
C0
Early chipset initialization:
-Disable shadow RAM
-Disable L2 cache (socket 7 or below)
-Program basic chipset registers
C1
Detect memory
-Auto-detection of DRAM size, type and ECC.
-Auto-detection of L2 cache (socket 7 or below)
C3
Expand compressed BIOS code to DRAM
C5
Call chipset hook to copy BIOS back to E000 & F000 shadowRAM.
01
Expand the Xgroup codes locating in physical address 1000:0
03
Initial Superio_Early_Init switch.
05
1. Blank out screen
2. Clear CMOS error flag
07
1. Clear 8042 interface
2. Initialize 8042 self-test
08
1. Test special keyboard controller for Winbond 977 series Super I/O chips.
2. Enable keyboard interface.
0A
1. Disable PS/2 mouse interface (optional).
2. Auto detect ports for keyboard & mouse followed by a port & interface swap (optional).
3. Reset keyboard for Winbond 977 series Super I/O chips.
0E
Test F000h segment shadow to see whether it is R/W-able or not. Iftest fails, keep beeping the speaker.
10
Auto detect flash type to load appropriate flash R/W codes into the run time area in F000 for ESCD & DMI support.
12
Use walking 1’s algorithm to check out interface in CMOS circuitry. Also set real-time clock power status, and then check for override.
14
Program chipset default values into chipset. Chipset default values are MODBINable by OEM customers.
16
Initial Early_Init_Onboard_Generator switch.
18
Detect CPU information including brand, SMI type (Cyrix or Intel) and CPU level (586 or 686).
1B
Initial interrupts vector table. If no special specified, all H/Winterrupts are directed to SPURIOUS_INT_HDLR & S/W interrupts to SPURIOUS_soft_HDLR.
1D
Initial EARLY_PM_INIT switch.
1F
Load keyboard matrix (notebook platform)
21
HPM initialization (notebook platform)
23
1. Check validity of RTC value: e.g. a value of 5Ah is an invalid value for RTC minute.
2. Load CMOS settings into BIOS stack. If CMOS checksum fails, use default value instead.
3. Prepare BIOS resource map for PCI & PnP use. If ESCD is valid, take into consideration of the ESCD’s legacy information.
4. Onboard clock generator initialization. Disable respective clock resource to empty PCI & DIMM slots.
5. Early PCI initialization:
-Enumerate PCI bus number
-Assign memory & I/O resource
-Search for a valid VGA device & VGA BIOS, and put it into C000:0.
27
Initialize INT 09 buffer
29
1. Program CPU internal MTRR (P6 & PII) for 0-640K memory address.
2. Initialize the APIC for Pentium class CPU.
3. Program early chipset according to CMOS setup. Example: onboard IDE controller.
4. Measure CPU speed.
5. Invoke video BIOS.
2D
1. Initialize multi-language
2. Put information on screen display, including Award title, CPU type, CPU speed ….
33
Reset keyboard except Winbond 977 series Super I/O chips.
3C
Test 8254
3E
Test 8259 interrupt mask bits for channel 1.
40
Test 8259 interrupt mask bits for channel 2.
43
Test 8259 functionality.
47
Initialize EISA slot
49
1. Calculate total memory by testing the last double word of each 64K page.
2. Program writes allocation for AMD K5 CPU.
4E
1. Program MTRR of M1 CPU
2. Initialize L2 cache for P6 class CPU & program CPU with proper cacheable range.
3. Initialize the APIC for P6 class CPU.
4. On MP platform, adjust the cacheable range to smaller one in case the cacheable ranges between each CPU are not identical.
50
Initialize USB
52
Test all memory (clear all extended memory to 0)
55
Display number of processors (multi-processor platform)
57
1. Display PnP logo
2. Early ISA PnP initialization
-Assign CSN to every ISA PnP device.
59
Initialize the combined Trend Anti-Virus code.
5B
(Optional Feature) Show message for entering AWDFLASH.EXE from FDD (optional)
5D
1. Initialize Init_Onboard_Super_IO switch.
2. Initialize Init_Onbaord_AUDIO switch.
60
Okay to enter Setup utility; i.e. not until this POST stage can users enter the CMOS setup utility.
65
Initialize PS/2 Mouse
67
Prepare memory size information for function call: INT 15h ax=E820h
69
Turn on L2 cache
6B
Program chipset registers according to items described in Setup & Auto-configuration table.
6D
1. Assign resources to all ISA PnP devices.
2. Auto assign ports to onboard COM ports if the corresponding item in Setup is set to “AUTO”.
6F
1. Initialize floppy controller
2. Set up floppy related fields in 40:hardware.
73
(Optional Feature) Enter AWDFLASH.EXE if :-AWDFLASH is found in floppy drive. -ALT+F2 is pressed
75
Detect & install all IDE devices: HDD, LS120, ZIP, CDROM…..
77
Detect serial ports & parallel ports.
7A
Detect & install co-processor
7F
1. Switch back to text mode if full screen logo is supported.
-If errors occur, report errors & wait for keys
-If no errors occur or F1 key is pressed to continue: wClear EPA or customization logo.
82
1. Call chipset power management hook.
2. Recover the text fond used by EPA logo (not for full screen logo)
3. If password is set, ask for password.
83
Save all data in stack back to CMOS
84
Initialize ISA PnP boot devices
85
1. USB final Initialization
2. NET PC: Build SYSID structure
3. Switch screen back to text mode
4. Set up ACPI table at top of memory.
5. Invoke ISA adapter ROMs
6. Assign IRQs to PCI devices
7. Initialize APM
8. Clear noise of IRQs.
93
Read HDD boot sector information for Trend Anti-Virus code
94
1. Enable L2 cache
2. Program boot up speed
3. Chipset final initialization.
4. Power management final initialization
5. Clear screen & display summary table
6. Program K6 write allocation
7. Program P6 class write combining
95
1. Program daylight saving
2. Update keyboard LED & typematic rate
96
1. Build MP table
2. Build & update ESCD
3. Set CMOS century to 20h or 19h
4. Load CMOS time into DOS timer tick
5. Build MSIRQ routing table.
FF
Boot attempt (INT 19h)
AMI POST CODE（PDF FILE）
PHOENIX POST CODE ＆ BEEP CODE （PDF FILE）
1短：系統啟動正常。
2短：CMOS設定錯誤。
一長一短：DRAM錯誤。
一長二短：顯示卡或螢幕連接錯誤。
一長三短：鍵盤錯誤。
一長九短：ROM錯誤。
不斷長響：DRAM未插好。
不停急響：電源有問題。
AMI
1短：DRAM刷新錯誤。
2短：DRAM 同位元檢查錯誤。
3短：基本64K RAM檢查失敗。
4短：計時器無法運算。
5短：CPU錯誤。
6短：8042無法取得A20（檢查鍵盤）。
7短：CPU中斷錯誤
8短：顯示卡記憶體寫入/讀取錯誤（檢查顯示卡）。
9短：ROM檢查碼錯誤。
10短：CMOS 關機暫存器寫入/讀取錯誤。
11短：快取記憶體故障。
燈號錯物代碼（微星主機板才有）
MSI D-LED
BIOS
Chipset
L2 Cache
BIOS Shadow
CPU Information
VGA
CPU
USB
IRQ
Memory
PS/2 Mouse
Auto Config
IDE
Dual CPU
IRQ TO PCI
OK
POST CODE （只有DEBUG CARD才會顯示）
AWARD 6.0 POST CODE
POST (hex)＆Description
CF
Test CMOS R/W functionality.
C0
Early chipset initialization:
-Disable shadow RAM
-Disable L2 cache (socket 7 or below)
-Program basic chipset registers
C1
Detect memory
-Auto-detection of DRAM size, type and ECC.
-Auto-detection of L2 cache (socket 7 or below)
C3
Expand compressed BIOS code to DRAM
C5
Call chipset hook to copy BIOS back to E000 & F000 shadowRAM.
01
Expand the Xgroup codes locating in physical address 1000:0
03
Initial Superio_Early_Init switch.
05
1. Blank out screen
2. Clear CMOS error flag
07
1. Clear 8042 interface
2. Initialize 8042 self-test
08
1. Test special keyboard controller for Winbond 977 series Super I/O chips.
2. Enable keyboard interface.
0A
1. Disable PS/2 mouse interface (optional).
2. Auto detect ports for keyboard & mouse followed by a port & interface swap (optional).
3. Reset keyboard for Winbond 977 series Super I/O chips.
0E
Test F000h segment shadow to see whether it is R/W-able or not. Iftest fails, keep beeping the speaker.
10
Auto detect flash type to load appropriate flash R/W codes into the run time area in F000 for ESCD & DMI support.
12
Use walking 1’s algorithm to check out interface in CMOS circuitry. Also set real-time clock power status, and then check for override.
14
Program chipset default values into chipset. Chipset default values are MODBINable by OEM customers.
16
Initial Early_Init_Onboard_Generator switch.
18
Detect CPU information including brand, SMI type (Cyrix or Intel) and CPU level (586 or 686).
1B
Initial interrupts vector table. If no special specified, all H/Winterrupts are directed to SPURIOUS_INT_HDLR & S/W interrupts to SPURIOUS_soft_HDLR.
1D
Initial EARLY_PM_INIT switch.
1F
Load keyboard matrix (notebook platform)
21
HPM initialization (notebook platform)
23
1. Check validity of RTC value: e.g. a value of 5Ah is an invalid value for RTC minute.
2. Load CMOS settings into BIOS stack. If CMOS checksum fails, use default value instead.
3. Prepare BIOS resource map for PCI & PnP use. If ESCD is valid, take into consideration of the ESCD’s legacy information.
4. Onboard clock generator initialization. Disable respective clock resource to empty PCI & DIMM slots.
5. Early PCI initialization:
-Enumerate PCI bus number
-Assign memory & I/O resource
-Search for a valid VGA device & VGA BIOS, and put it into C000:0.
27
Initialize INT 09 buffer
29
1. Program CPU internal MTRR (P6 & PII) for 0-640K memory address.
2. Initialize the APIC for Pentium class CPU.
3. Program early chipset according to CMOS setup. Example: onboard IDE controller.
4. Measure CPU speed.
5. Invoke video BIOS.
2D
1. Initialize multi-language
2. Put information on screen display, including Award title, CPU type, CPU speed ….
33
Reset keyboard except Winbond 977 series Super I/O chips.
3C
Test 8254
3E
Test 8259 interrupt mask bits for channel 1.
40
Test 8259 interrupt mask bits for channel 2.
43
Test 8259 functionality.
47
Initialize EISA slot
49
1. Calculate total memory by testing the last double word of each 64K page.
2. Program writes allocation for AMD K5 CPU.
4E
1. Program MTRR of M1 CPU
2. Initialize L2 cache for P6 class CPU & program CPU with proper cacheable range.
3. Initialize the APIC for P6 class CPU.
4. On MP platform, adjust the cacheable range to smaller one in case the cacheable ranges between each CPU are not identical.
50
Initialize USB
52
Test all memory (clear all extended memory to 0)
55
Display number of processors (multi-processor platform)
57
1. Display PnP logo
2. Early ISA PnP initialization
-Assign CSN to every ISA PnP device.
59
Initialize the combined Trend Anti-Virus code.
5B
(Optional Feature) Show message for entering AWDFLASH.EXE from FDD (optional)
5D
1. Initialize Init_Onboard_Super_IO switch.
2. Initialize Init_Onbaord_AUDIO switch.
60
Okay to enter Setup utility; i.e. not until this POST stage can users enter the CMOS setup utility.
65
Initialize PS/2 Mouse
67
Prepare memory size information for function call: INT 15h ax=E820h
69
Turn on L2 cache
6B
Program chipset registers according to items described in Setup & Auto-configuration table.
6D
1. Assign resources to all ISA PnP devices.
2. Auto assign ports to onboard COM ports if the corresponding item in Setup is set to “AUTO”.
6F
1. Initialize floppy controller
2. Set up floppy related fields in 40:hardware.
73
(Optional Feature) Enter AWDFLASH.EXE if :-AWDFLASH is found in floppy drive. -ALT+F2 is pressed
75
Detect & install all IDE devices: HDD, LS120, ZIP, CDROM…..
77
Detect serial ports & parallel ports.
7A
Detect & install co-processor
7F
1. Switch back to text mode if full screen logo is supported.
-If errors occur, report errors & wait for keys
-If no errors occur or F1 key is pressed to continue: wClear EPA or customization logo.
82
1. Call chipset power management hook.
2. Recover the text fond used by EPA logo (not for full screen logo)
3. If password is set, ask for password.
83
Save all data in stack back to CMOS
84
Initialize ISA PnP boot devices
85
1. USB final Initialization
2. NET PC: Build SYSID structure
3. Switch screen back to text mode
4. Set up ACPI table at top of memory.
5. Invoke ISA adapter ROMs
6. Assign IRQs to PCI devices
7. Initialize APM
8. Clear noise of IRQs.
93
Read HDD boot sector information for Trend Anti-Virus code
94
1. Enable L2 cache
2. Program boot up speed
3. Chipset final initialization.
4. Power management final initialization
5. Clear screen & display summary table
6. Program K6 write allocation
7. Program P6 class write combining
95
1. Program daylight saving
2. Update keyboard LED & typematic rate
96
1. Build MP table
2. Build & update ESCD
3. Set CMOS century to 20h or 19h
4. Load CMOS time into DOS timer tick
5. Build MSIRQ routing table.
FF
Boot attempt (INT 19h)
AMI POST CODE（PDF FILE）
PHOENIX POST CODE ＆ BEEP CODE （PDF FILE）
本文来源：未知 作者：佚名
天下网吧·网吧天下
闽公网安备35010202000238号